A digital to time converter is a circuit which accepts a digital signal and produces a proportional time delay. The delay appears as a time difference between two pulses appearing at the output of the device or between a trigger pulse and a pulse appearing at the output of the device. Digital-to time conversion is usually performed by comparing a linearly increasing voltage or current ramp to a threshold voltage or current. In one form of digital-to time converter, a fixed threshold voltage is compared to a ramp voltage having a variable slope. The slope of the ramp voltage is determined from the value of the input digital word. In another form of the converter, a ramp voltage with a fixed slope is compared to a variable threshold voltage whose level is determined in accordance with the input digital word. In either case, when the ramp voltage equals the value of the threshold voltage, a pulse signal is generated. The time between the start of the ramp signal and the pulse signal represents the value of the digital word.
A monolithic integrated circuit capable of accurate digital-to-time conversion over a range of temperatures and power supply variations is disclosed in U.S. Pat. No. 4,742,331, issued May 3, 1988 to Barrow et al and assigned to the assignee of the present application. The disclosed digital to time converter compares a ramp voltage with a threshold voltage whose level is set in accordance with the input digital word. The ramp voltage is generated by charging a ramp capacitor with a current whose value is determined by a ramp resistor. The ramp resistor and/or the ramp capacitor are externally selectable to provide different time delay ranges. In order to stabilize the device, a voltage coupling circuit ensures that changes in the ramp voltage caused by temperature and power supply variations track changes in the threshold voltage. Thus, temperature and power supply variations produce a common mode signal which is rejected by the comparator that compares the ramp voltage and the threshold voltage. The disclosed converter provides highly satisfactory operation over a range of time delays.
The digital-to time converter disclosed in Pat. No. 4,742,331 operates from positive and negative voltage supplies. It has been found desirable to provide a digital to-time converter which is TTL compatible, which operates from a single voltage supply and which is highly accurate, even for long time delays. For large values of the ramp resistor, the charging current is small, and normally negligible transistor base currents in the voltage coupling circuit become an appreciable percentage of the charging capacitor current. Such transistor base currents cause the ramp slope to differ from the desired slope, producing errors in the output time delay. It is desirable to provide accurate operation of the digital to time converter over a wide range of time delays.
It is a general object of the present invention to provide an improved digital-to time converter.
It is a further object of the present invention to provide a digital to time converter for generating accurate, long duration time delays.
It is a further object of the present invention to provide a digital to time converter for operation from a single voltage supply.
It is yet another object of the present invention to provide an improved voltage coupling circuit for stabilizing a digital to time converter.
It is a further object of the present invention to provide a voltage coupling circuit for stabilizing a digital-to time converter wherein transistor base current errors are eliminated.